Spatio-temporal development of surface charges on spacers stressed with DC voltages

Date

1990-6

Author

Bektas, S.I.

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The development of surface charge on a right-cylindrical spacer under different DC stress levels is measured in SF/sub 6/ for several hours. The DC voltage stress levels are below the stresses where partial discharges with AC voltage generally occur. The measurements indicate that charges are mainly deposited on one side only of the spacer and are predominantly of opposite polarity to that of the applied voltage. The charge and its area increase with time and saturate. Typical saturation times are approximately 3 and 9 h for 10 kV and 5 kV respectively. Magnitudes of saturated charge increase linearly with applied voltage. Various factors which may affect charge accumulation pattern are investigated. Measurements show that charge deposition on a spacer are influenced insignificantly by gamma -irradiation or a change of gas from SF/sub 6/ to air. However, charge depositions are influenced by surface conductance of the spacer. The charging of the spacer is negligible when stressed with AC and impulse voltages with peak voltages in a range similar to the DC levels used.< >

Subject Keywords

Engineering, Electrical & Electronic

URI

https://hdl.handle.net/11511/51362

Journal

IEEE Transactions on Electrical Insulation

DOI

https://doi.org/10.1109/14.55725

Collections

Department of Electrical and Electronics Engineering, Article

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Citation Formats

S. I. Bektas, “Spatio-temporal development of surface charges on spacers stressed with DC voltages,” IEEE Transactions on Electrical Insulation, pp. 515–520, 1990, Accessed: 00, 2020. [Online]. Available: https://hdl.handle.net/11511/51362.