FGX implementation in two case studies



FPM Based Partitioning and Assignment Algorithm for Data Parallel Applications on Heterogeneous Platforms
Alasmar, Mahmoud; Akar, Gözde; Bazlamaçcı, Cüneyt F.; Department of Electrical and Electronics Engineering (2022-7-01)
Advances in modern computing devices and applications created the challenge of efficient utilization of resources in satisfying the requirements of running applica- tions. The present work aims to find an efficient workload distribution algorithm for data parallel applications of type single program multiple data (SPMD) running on a heterogeneous computing platform. We first consider a discrete functional perfor- mance model (FPM) that integrates processing speed and capacity of processing ele- ments with t...
Fpga implementation of jointly operating channel estimator and parallelized decoder
Kılcıoğlu, Çağlar; Yılmaz, Ali Özgür; Department of Electrical and Electronics Engineering (2009)
In this thesis, implementation details of a joint channel estimator and parallelized decoder structure on an FPGA-based platform is considered. Turbo decoders are used for the decoding process in this structure. However, turbo decoders introduce large decoding latencies since they operate in an iterative manner. To overcome that problem, parallelization is applied to the turbo codes and the resulting parallel decodable turbo code (PDTC) structure is employed for coding. The performance of a PDTC decoder and...
FGPA based cryptography computation platform and the basis conversion in composite finite fields
Sial, Muhammad Riaz; Akyıldız, Ersan; Department of Cryptography (2013)
In the study of this thesis work we focused on the hardware based cryptographic algorithms computation platform, especially for elliptic-curve and hyper-elliptic curve based protocols. We worked for making the hyperelliptic curve based Tate Pairing computation efficient specially for hardware implementations. To achieve this one needs to make the underlying finite field arithmetic implementations efficient. For this we study the finite fields of type $\mathbb{F}_q, q=p^{2pn}$ from the efficient implementati...
FPGA implementation of graph cut method for real time stereo matching
Sağlık Özsaraç, Havva; Ünver, Baki Zafer; Ulusoy, İlkay; Department of Electrical and Electronics Engineering (2010)
The present graph cut methods cannot be used directly for real time stereo matching applications because of their recursive structure. Graph cut method is modified to change its recursive structure so that making it suitable for real time FPGA (Field Programmable Gate Array) implementation. The modified method is firstly tested by MATLAB on several data sets, and the results are compared with those of previous studies. Although the disparity results of the modified method are not better than other methods’,...
FPGA implementation of neuro-fuzzy system with improved PSO learning
KARAKUZU, CİHAN; KARAKAYA, FUAT; Cavuslu, Mehmet Ali (2016-07-01)
This paper presents the first hardware implementation of neuro-fuzzy system (NFS) with its metaheuristic learning ability on field programmable gate array (FPGA). Metaheuristic learning of NFS for all of its parameters is accomplished by using the improved particle swarm optimization (iPSO). As a second novelty, a new functional approach, which does not require any memory and multiplier usage, is proposed for the Gaussian membership functions of NFS. NFS and its learning using iPSO are implemented on Xilinx...
Citation Formats
V. Purutçuoğlu Gazi, “FGX implementation in two case studies,” 2010, Accessed: 00, 2021. [Online]. Available: https://hdl.handle.net/11511/71658.