Respurce sharing among LSI-11/2 microcomputer systems.

Ozturk, Yusuf


Rescheduling unrelated parallel machines with total flow time and total disruption cost criteria
Ozlen, M.; Azizoğlu, Meral (Informa UK Limited, 2011-01-01)
In this paper, we consider a rescheduling problem where a set of jobs has already been assigned to unrelated parallel machines. When a disruption occurs on one of the machines, the affected jobs are rescheduled, considering the efficiency and the schedule deviation measures. The efficiency measure is the total flow time, and the schedule deviation measure is the total disruption cost caused by the differences between the initial and current schedules. We provide polynomial-time solution methods to the follo...
Softnet:design and implementation of a local area network.
Duman, S Osman; Department of Computer Engineering (1985)
Power-Delay Analysis of an ABACUS Parallel Integer Multiplier VLSI Implementation
Ercan, Furkan; Muhtaroglu, Ali (2015-03-26)
ABACUS parallel architecture was previously proposed as an alternate integer multiplication approach with column compression and parallel carry futures. This paper presents a VLSI implementation for ABACUS and benchmarks it against the conventional Wallace Tree Multiplier (WTM). Simulations are conducted with UMC180nm technology in Cadence environment. Although WTM implementation results in 26.6% fewer devices, ABACUS implementation has 8.6% less power dissipation with matched delay performance, due to 27.8...
Power stage design and implementation of a deploymentmechanism driver for space applications
Özdemir, Başak Gonca; Hızal, Mirzahan; Department of Electrical and Electronics Engineering (2012)
With the developments in space technology, the capabilities of spacecrafts have been increased considerably which in turn have entailed the development of more efficient spacecrafts in terms of cost, mass, size and power. One way to achieve such a development is the replacement of body mounted appendages with the deployable ones, which greatly reduces the size, mass and cost of the spacecraft especially when large appendages are considered. In order to obtain these deployable structures, deployment mechanis...
Power Spectra of Constrained Codes with Level-Based Signaling: Overcoming Finite-Length Challenges
Centers, Jessica; Tan, Xinyu; Hareedy, Ahmed; Calderbank, Robert (2021-08-01)
In various practical systems, certain data patterns are prone to errors if written or transmitted. In magnetic recording and communication over transmission lines, data patterns causing consecutive transitions that are not sufficiently separated are prone to errors. In Flash memory with two levels per cell, data patterns causing high-low-high charge levels on adjacent cells are prone to errors. Constrained codes are used to eliminate error-prone patterns, and they can also achieve other goals. Recently, we ...
Citation Formats
Y. Ozturk, “Respurce sharing among LSI-11/2 microcomputer systems.,” Middle East Technical University, 1985.