Date

2021-01-01

Author

Hareedy, Ahmed
Dabak, Beyza
Calderbank, Robert

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© 1963-2012 IEEE.Flash memory devices are winning the competition for storage density against magnetic recording devices. This outcome results from advances in physics that allow storage of more than one bit per cell, coupled with advances in signal processing that reduce the effect of physical instabilities. Constrained codes are used in storage to avoid problematic patterns, and thus prevent errors from happening. Recently, we introduced binary symmetric lexicographically-ordered constrained codes (LOCO codes) for data storage and data transmission. LOCO codes are capacity-achieving, simple, and can be easily reconfigured. This paper introduces simple constrained codes that support non-binary physical gates in multi, triple, quad, and the currently-in-development penta-level cell (M/T/Q/P-LC) Flash memories. The new codes can be easily modified if problematic patterns change with time. These codes are designed to mitigate inter-cell interference, which is a critical source of error in Flash devices. The occurrence of errors is a consequence of parasitic capacitances in and across floating-gate transistors, resulting in charge propagation from cells being programmed to the highest charge level to neighboring cells being programmed to lower levels or unprogrammed/erased. This asymmetric nature of error-prone patterns distinguishes Flash memories. The new codes are called $q$ -ary asymmetric LOCO codes (QA-LOCO codes), and the construction subsumes codes previously designed for single-level cell (SLC) Flash devices (A-LOCO codes). QA-LOCO codes work for a Flash device with any number, $q$ , of levels per cell. For $q \geq 4$ , we show that QA-LOCO codes can achieve rates greater than $0.95 \log _{2} \!q$ input bits per coded symbol. The complexity of encoding and decoding is modest, and reconfiguring a code is as easy as reprogramming an adder. Capacity-achieving rates, affordable encoding-decoding complexity, and ease of reconfigurability support the growing improvement of M/T/Q/P-LC Flash memory devices, as well as lifecycle management as the characteristics of these devices change with time, which increases their lifetime.

Subject Keywords

asymmetric constrained codes, data storage, device lifetime, flash memories, lexicographic ordering, non-binary gates, q-ary codes, reconfigurable codes

URI

https://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=85098545681&origin=inward
https://hdl.handle.net/11511/98253

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Department of Electrical and Electronics Engineering, Article