A reconfigurable computing platform for real time embedded applications

Reconfigurable computing is a promising technique for real time computing-intensive embedded applications. In this paper, we propose a novel hardware task model and an optimal 20 surface partitioning strategy for managing a partially run time reconfigurable hardware resource. A mesh network-on-chip is designed to be used as the communication environment for the hardware tasks. An offline design flow is proposed for generating the bit-stream and finally, an online real time operating system scheduler that supports true hardware multitasking is presented. The proposed components form the necessary building blocks of a complete reconfigurable computing platform suitable for real time computing-intensive embedded applications.
Microprocessors and Microsystems


A reconfigurable computing platform for real time embedded applications
Say, Fatih; Halıcı, Uğur; Department of Electrical and Electronics Engineering (2011)
Today’s reconfigurable devices successfully combine ‘reconfigurable computing machine’ paradigm and ‘high degree of parallelism’ and hence reconfigurable computing emerged as a promising alternative for computing-intensive applications. Despite its superior performance and lower power consumption compared to general purpose computing using microprocessors, reconfigurable computing comes with a cost of design complexity. This thesis aims to reduce this complexity by providing a flexible and user friendly dev...
A Digitally programmable application specific integrated circuit for drive and data acquisition of imaging sensorsMethod of moments analysis of slotted waveguide antenna arrays
Bayhan, Nusret; Akın, Tayfun; Eminoğlu, Selim; Department of Electrical and Electronics Engineering (2014)
This thesis explains the implementation of a digital programmable Application Specific Integrated Circuit (ASIC) designed for imaging applications. The primary function of this ASIC is to drive imaging sensors and to do basic processing on the digital video data coming from the sensors. The ASIC is designed to handle the communication between the imaging sensor and the system. Using command based high-level instructions, this two-way communication is simplified. The ASIC can also be used to store and update...
Yazıcı, Fatih; Schmidt, Şenan Ece; Department of Electrical and Electronics Engineering (2021-8-13)
This thesis work proposes ReFlex Switch, a novel, scalable on-chip packet switch architecture, that is designed to interconnect heterogeneous IP cores at high speeds. One target application for ReFlex switch is hardware accelerated cloud computing where the cloud servers feature FPGA cards with reconfigurable regions to implement accelerators demanded by the users. In this setting, the increasing data rates call for line-speed operation of the on-chip switch to maintain scalability. The first requirement o...
A temporal neural network model for constructing connectionist expert system knowledge bases
Alpaslan, Ferda Nur (Elsevier BV, 1996-04-01)
This paper introduces a temporal feedforward neural network model that can be applied to a number of neural network application areas, including connectionist expert systems. The neural network model has a multi-layer structure, i.e. the number of layers is not limited. Also, the model has the flexibility of defining output nodes in any layer. This is especially important for connectionist expert system applications.
A visual programming framework for distributed Internet of Things centric complex event processing
Gökalp, Mert Onuralp; Koçyiğit, Altan; Eren, Pekin Erhan (2019-03-01)
Complex Event Processing (CEP) is a promising approach for real-time processing of big data streams originating from Internet of Things (IoT) devices. Even though scalability and flexibility are key issues for IoT applications, current studies are mostly based on centralized solutions and restrictive query languages. Moreover, development, deployment and operation of big-data applications require significant amount of technical expertise. Hence, a framework that provides a higher abstraction level programmi...
Citation Formats
F. Say and C. F. Bazlamaçcı, “A reconfigurable computing platform for real time embedded applications,” Microprocessors and Microsystems, pp. 13–32, 2012, Accessed: 00, 2020. [Online]. Available: https://hdl.handle.net/11511/28454.