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Performance of the double-LIE architecture
Date
1996-05-16
Author
Bilgen, Semih
Salamah, M
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This work is licensed under a
Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 International License
.
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The Double-LIB is an ATM-based switch architecture we have proposed for distributed memory multiprocessor systems. It is essentially a development of the Limited Intermediate Buffer (LIB) idea which was originally proposed to overcome the drawbacks of input and output buffered ATM switches. In this paper, we summarize the characteristics of the Double-LIB and then proceed to report some simulation-based performance results. It is our conclusion that the Double-LIB switch is promising as a solution to the distributed memory multiprocessor communication problem.
Subject Keywords
Switches
,
Communication switching
,
Asynchronous transfer mode
,
Delay
,
Throughput
,
Traffic control
,
Multiprocessing systems
,
Scalability
,
Loss measurement
,
Message passing
URI
https://hdl.handle.net/11511/63244
Collections
Graduate School of Natural and Applied Sciences, Conference / Seminar