Date

2017-8

Author

Jayaweera, Herath

Metadata

Show full item record

This work is licensed under a Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 International License.

Item Usage Stats

194
views

170
downloads

Cite This

The self-starting on-chip fully integrated ultra-low voltage DC-DC converters for energy harvesting applications presented in literature generally have low efficiency and output power capacity. Any improvement in DC-DC converter circuits in terms of energy efficiency, output power, self-starting modes, and voltage gain will contribute significantly to the widespread application of energy harvesters. Two novel fully integrated, self-starting, ultra-low voltage DC-DC converter topologies and model based optimization methodologies for these converters are studied in this thesis for efficient micro-power energy harvesting applications. According to the pre-layout simulations in standard UMC 180nm CMOS technology, the proposed 3-, 4-, and 5-stage DC-DC converter with voltage doubling LC oscillator can achieve 47.9%, 51.5%, 51.7% efficiency, and deliver 343 µW at 1.02 V output, 385 µW at 1.39 V output, and 454 µW at 1.65 V output respectively for 0.2 V input. The voltage quadrupling LC tank coupled DC-DC converter with 4 and 3 stages can achieve 33% and 31% efficiency while delivering 1193 µW at 2.18 V output, and 778 µW at 1.77 V output respectively for 0.2 V input. The measurements from the fabricated test chip for the first topology indicate major deviations from the simulations, i.e. the measured simulation peak efficiency is < 7% at 0.2 V input. Comprehensive design validation and analysis is presented for the discrepancy, which results in post-layout simulations of a new model that can be correlated to silicon observations. The fixes to the design and layout have been taped out as part of a second revision of the test chip to overcome the problems. The post-layout simulations for the new design achieve a peak efficiency of 41.5% at 1.54 V output, and 41% at 1.27 V output with 5 and 4 stages respectively for 0.2 V input. The theoretical analysis and optimization methods presented in this thesis are verified through simulations in Cadence environment.

Subject Keywords

DC-DC Converter, Energy Efficiency, Charge Pump Circuit, LC Tank Oscillator

URI

https://hdl.handle.net/11511/69827

Collections

Northern Cyprus Campus, Thesis