An On-chip Switch Architecture for Hardware Accelerated Cloud Computing Systems Donanim Hizlandiricili Bulut Bilisim Sistemleri icin Yonga-ustu Anahtar Mimarisi

Date

2020-10-05

Author

Yazıcı, Fatih
Yildiz, Ayhan Sefa
Yazar, Alper
Schmidt, Şenan Ece

Metadata

Show full item record

This work is licensed under a Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 International License.

Item Usage Stats

86
views

0
downloads

© 2020 IEEE.In this paper, we propose a scalable on-chip packet switch architecture for hardware accelerated cloud computing systems. Our proposed switch architecture is implemented on the FPGA and interconnects reconfigurable regions, 40 Gbps Ethernet interfaces and a PCIe interface. The switch fabric operates at line speed to achieve scalability. We propose a new algorithm that grants access to the fabric according to the allocated prioritization to input-output port pairs. The switch is implemented on Xilinx Zynq 7000-SoC and can work at 40 Gbps rate. Our simulation results show that our proposed algorithm achieves desired prioritization without degrading the throughput.

Subject Keywords

cloud computing, on-chip switch, switch fabric arbitration.

URI

https://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=85100311125&origin=inward
https://hdl.handle.net/11511/100340

DOI

https://doi.org/10.1109/siu49456.2020.9302370

Conference Name

28th Signal Processing and Communications Applications Conference, SIU 2020

Collections

Department of Electrical and Electronics Engineering, Conference / Seminar

Suggestions

OpenMETU
Core

A NOVEL FLEXIBLE ON-CHIP SWITCH ARCHITECTURE FOR RECONFIGURABLE HARDWARE ACCELERATORS Yazıcı, Fatih; Schmidt, Şenan Ece; Department of Electrical and Electronics Engineering (2021-8-13) This thesis work proposes ReFlex Switch, a novel, scalable on-chip packet switch architecture, that is designed to interconnect heterogeneous IP cores at high speeds. One target application for ReFlex switch is hardware accelerated cloud computing where the cloud servers feature FPGA cards with reconfigurable regions to implement accelerators demanded by the users. In this setting, the increasing data rates call for line-speed operation of the on-chip switch to maintain scalability. The first requirement o...
DESIGN, IMPLEMENTATION AND VERIFICATION OF A HIGH-SPEED ON-CHIP PACKET SWITCH YILDIZ, Ayhan Sefa; Schmidt, Şenan Ece; Department of Electrical and Electronics Engineering (2022-2-9) In this thesis, an on-chip packet switch architecture to interconnect modules on System on Chip (SoC) platforms at high line speeds is proposed. The particular target application for the proposed on-chip switch is hardware accelerated cloud computing systems. To this end, FPGA Accelerator Cards (FAC) are employed in heterogeneous cloud data centers which implement hardware accelerators on the FPGA. The data from the cloud user is brought on the accelerators and delivered after processing through high-speed ...
A reconfigurable computing platform for real time embedded applications Say, Fatih; Halıcı, Uğur; Department of Electrical and Electronics Engineering (2011) Today’s reconfigurable devices successfully combine ‘reconfigurable computing machine’ paradigm and ‘high degree of parallelism’ and hence reconfigurable computing emerged as a promising alternative for computing-intensive applications. Despite its superior performance and lower power consumption compared to general purpose computing using microprocessors, reconfigurable computing comes with a cost of design complexity. This thesis aims to reduce this complexity by providing a flexible and user friendly dev...
A Software Development Process Model for Cloud by Combining Traditional Approaches Hacaloglu, Tuna; Eren, Pekin Erhan; Mishra, Deepti; Mishra, Alok (2015-10-30) Even though cloud computing is a technological paradigm that has been adopted more and more in various domains, there are few studies investigating the software development lifecycle in cloud computing applications and there is still not a comprehensive software development process model developed for cloud computing yet. Due to the nature of cloud computing that is completely different from the traditional software development, there is a need of suggesting process models to perform the software developmen...
CLOUDGEN: Workload generation for the evaluation of cloud computing systems CLOUDGEN: Bulut Bilişim Sistemlerinin Başarim Deǧerlendirmesi icin Iş Yuku Uretimi Koltuk, Furkan; Yazar, Alper; Schmidt, Şenan Ece (2019-04-01) In this paper, we propose CLOUDGEN workflow that produces synthetic workloads for Infrastructure and Platform as a Service for the evaluation of resource management approaches in cloud computing systems. To this end, CLOUDGEN systematically processes and clusters records in a given workload trace and fits distributions for different workload parameters within the clusters. Different than the previous work, clustering is carried out to produce different virtual machine types for achieving models that are sui...

Citation Formats

F. Yazıcı, A. S. Yildiz, A. Yazar, and Ş. E. Schmidt, “An On-chip Switch Architecture for Hardware Accelerated Cloud Computing Systems Donanim Hizlandiricili Bulut Bilisim Sistemleri icin Yonga-ustu Anahtar Mimarisi,” presented at the 28th Signal Processing and Communications Applications Conference, SIU 2020, Gaziantep, Türkiye, 2020, Accessed: 00, 2022. [Online]. Available: https://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=85100311125&origin=inward.