Modelling and noise analysis of closed-loop capacitive sigma-delta mems accelerometer

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2009

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Boğa, Biter

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This thesis presents a detailed SIMULINK model for a conventional capacitive Σ-Δ accelerometer system consisting of a MEMS accelerometer, closed-loop readout electronics, and signal processing units (e.g. decimation filters). By using this model, it is possible to estimate the performance of the full accelerometer system including individual noise components, operation range, open loop sensitivity, scale factor, etc. The developed model has been verified through test results using a capacitive MEMS accelerometer, full-custom designed readout electronics, and signal processing unit implemented on a FPGA. Conventional accelerometer system with force-feedback is used in this thesis. The sensor is a typical capacitive lateral accelerometer. The readout electronics form a 2nd order electromechanical Σ-Δ modulator together with the accelerometer, and provide a single-bit PDM output, which is decimated and filtered with a signal processing unit, software implemented on a FPGA. The whole system is modeled in MATLAB-SIMULINK since it has both mechanical and electrical parts. To verify the model, two accelerometer systems are implemented. Each accelerometer system is composed of a MEMS accelerometer, readout circuit, and decimation filters. These two different designs are implemented and simulation and test results are compared in terms of output noise, operational range, open loop sensitivity, and scale factor. The first design operates at 500 kHz sampling rate and has 0.48 V/g open-loop sensitivity, 58.7 µg/√Hz resolution, ±12g operation range, and 0.97*10-6 g/(output units) scale factor, where these numbers are in close agreement with the estimated results found with simulations. Similarly, the second design operates at 500 kHz sampling rate and has 0.45 V/g open-loop sensitivity, 373.3 µg/√Hz resolution, ±31g operation range, and 2.933*10-6 g/(output units) scale factor, where these numbers are also close to the estimated results found with simulations. Within this thesis study, an accelerometer sensing element design algorithm is also proposed which is based on the theoretical background obtained in accelerometer system SIMULINK model. This algorithm takes the requirements of the desired accelerometer as input and outputs the dimensions of the minimum noise accelerometer satisfying these requirements. The algorithm is extended to design three different accelerometer structures. An accelerometer sensing element is designed using the proposed design algorithm and tested in order to see performance matching of the algorithm. The designed accelerometer has ±33.02g operational range and 155µg/√Hz noise where these numbers matches with the values found by the algorithm.

Subject Keywords

Electrical engineering.

URI

http://etd.lib.metu.edu.tr/upload/3/12610772/index.pdf
https://hdl.handle.net/11511/18701

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Graduate School of Natural and Applied Sciences, Thesis

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Citation Formats

B. Boğa, “Modelling and noise analysis of closed-loop capacitive sigma-delta mems accelerometer,” M.S. - Master of Science, Middle East Technical University, 2009.