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Design and performance of capacity approaching irregular low-density parity-check codes
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Date
2009
Author
Bardak, Erinç Deniz
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In this thesis, design details of binary irregular Low-Density Parity-Check (LDPC) codes are investigated. We especially focus on the trade-off between the average variable node degree, wa, and the number of length-6 cycles of an irregular code. We observe that the performance of the irregular code improves with increasing wa up to a critical value, but deteriorates for larger wa because of the exponential increase in the number of length-6 cycles. We have designed an irregular code of length 16,000 bits with average variable node degree wa=3.8, that we call ‘2/3/13’ since it has some variable nodes of degree 2 and 13 in addition to the majority of degree-3 nodes. The observed performance is found to be very close to that of the capacity approaching commercial codes. Time spent for decoding 50,000 codewords of length 1800 at Eb/No=1.6 dB for an irregular 2/3/13 code is measured to be 19% less than that of the regular (3, 6) code, mainly because of the smaller number of decoding failures.
Subject Keywords
Electrical engineering.
,
Telecommunication.
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http://etd.lib.metu.edu.tr/upload/12611084/index.pdf
https://hdl.handle.net/11511/18849
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Graduate School of Natural and Applied Sciences, Thesis
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E. D. Bardak, “Design and performance of capacity approaching irregular low-density parity-check codes,” M.S. - Master of Science, Middle East Technical University, 2009.
