Show/Hide Menu
Hide/Show Apps
anonymousUser
Logout
Türkçe
Türkçe
Search
Search
Login
Login
OpenMETU
OpenMETU
About
About
Açık Bilim Politikası
Açık Bilim Politikası
Frequently Asked Questions
Frequently Asked Questions
Browse
Browse
By Issue Date
By Issue Date
Authors
Authors
Titles
Titles
Subjects
Subjects
Communities & Collections
Communities & Collections
A Hybrid Method to Estimate Velocity and Acceleration using Low-Resolution Optical Incremental Encoders
Date
2010-09-10
Author
Baser, Ozgur
Kilic, Ergin
Konukseven, Erhan İlhan
Dölen, Melik
Metadata
Show full item record
This work is licensed under a
Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 International License
.
Item Usage Stats
0
views
0
downloads
Accurate velocity and acceleration estimates are required for model-reduced disturbance compensation in motion and force control applications. Such paradigms mostly rely on the position measurements of optical incremental encoders that are known to suffer from the quantization effects introduced by these devices (and their accompanying interfaces). Fixed-time (FT) and fixed-position (FP) methods are used to estimate velocity and acceleration from the quantized position signal. Using Field Programmable Gate Arrays (FPGAs) with high-frequency clock (timing) sources can reduce the effect of temporal quantization and improve the estimation performance of FP methods. However, it has low resolution for acceleration estimation especially at high frequencies and causes an impulsive change of acceleration estimation when the direction of motion dynamically changes. On the other hand, as one of the FT methods, adaptive windowing estimation method yields the best solution for the problematic cases of FP method. These two methods can be rolled into a single technique by applying parametric smooth transition in order to estimate velocity and acceleration for entire operating region. This paper presents a hybrid velocity and acceleration estimation method using low resolution incremental encoder, which can be implemented by a FPGA.
URI
https://hdl.handle.net/11511/52840
Collections
Department of Mechanical Engineering, Conference / Seminar