A hybrid silicon microaccelerometer system with CMOS interface circuit

2000-01-01
Salian, A
Külah, Haluk
Yazdi, N
He, GH
Najafi, K
This paper presents a hybrid microaccelerometer subsystem consisting of an all-silicon pg capacitive microaccelerometer and a low noise CMOS capacitive interface circuit. This accelerometer has a measured sensitivity of 1.4 muF/g for a device with 2mm a lmm proof mass and 1.4pm air gap. The calculated mechanical noise floor for the device is 0.39 mug/vHz in atmosphere. The circuit has a 95dB dynamic range; a low offset of 370 muV and can resolve better than 75aF. The overall sensitivity of the complete module is measured as 160mV/g with a noise floor of 3.6 muV/vRz (-110dBV/vHz), indicating that the current system is capable of resolving about 20 mug/vHz.

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Citation Formats
A. Salian, H. Külah, N. Yazdi, G. He, and K. Najafi, “A hybrid silicon microaccelerometer system with CMOS interface circuit,” presented at the 43rd IEEE Midwest Symposium on Circuits and Systems, Lansing, MI, USA, 2000, Accessed: 00, 2020. [Online]. Available: https://hdl.handle.net/11511/53000.