Pilot-aided packet synchronization and single-tone parameter estimation on an FPGA platform FPGA platformunda pilot dizini ekleme yöntemiyle paket senkronizasyonu ve tek ton parametre kestirimi

2007-12-01
Özel, Ömür
Vural, Mehmet
Yılmaz, Ali Özgür
In this paper, an FPGA implementation in which packet synchronization is performed by transmitting pilot sequences will be explained. In addition, in order to recover the frequency offset between the frequencies of oscillators at the transmitter and the receiver, a PLL like structure is proposed.

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Citation Formats
Ö. Özel, M. Vural, and A. Ö. Yılmaz, “Pilot-aided packet synchronization and single-tone parameter estimation on an FPGA platform FPGA platformunda pilot dizini ekleme yöntemiyle paket senkronizasyonu ve tek ton parametre kestirimi,” 2007, Accessed: 00, 2020. [Online]. Available: https://hdl.handle.net/11511/57942.