Data-parallel programming on Helios, Parallel environment and PVM

1996-09-27
Sener, C
Paker, Y
Kiper, A
Parallel computing, increasingly used for computationally intensive problems, requires considerable expertise and time, limiting then widespread use. This article presents a data-parallel programming tool to simplify the task of developing parallel programs based on data-parallel type. It has been originally developed for the Hellos operating system running on a network of Transputers, and then ported to the IBM SP/2 system executing two parallel programming environments. With its interface to the C language, it is portable to the parallel environments having the support for the basic message passing primitives send and receive. The use of the tool is illustrated and explained through the example of finding column-sums of a matrix. Finally, the performance of the tool is discussed focusing on the speed-up curves of the parallel programs developed with the tool to solve a numerical and an image processing problem.

Suggestions

Power-delay optimized VLSI threshold detection circuits and their use in parallel integer multiplication
Ercan, Furkan; Muhtaroğlu, Ali; Sustainable Environment and Energy Systems (2015-6)
Threshold detection is a fundamental logic function that has broad use in arithmetic processors, and other digital applications. Thus, any improvement in threshold detection in terms of power and/or delay contributes significantly to the field of digital circuit design. A recently reported parallel integer multiplier architecture, ABACUS, uses column compression networks to compress partial products through the final addition network. Architecture of column compression network of ABACUS is suitable for thre...
Boostıng performance of hls optımızatıon for soc based hardware accelerators.
Kocaay, Aziz Berkin; Bazlamaçcı, Cüneyt F..; Department of Electrical and Electronics Engineering (2020)
Modern large-scale computing algorithms require huge amount of computational power. In adapting to increasing computation demands, FPGA-based SoC platforms provide an alternative to traditional CPU or GPU units, which suffer from thermal problems, power issues, etc. However, design flow for FPGA based development may be hard and time-consuming for an average software engineer who has limited knowledge about hardware design. A new approach in FPGA-based system development without the need for a hardware engi...
Numerical study on effects of computational domain length on flow field in standing wave thermoacoustic couple
MERGEN, SÜHAN; Yıldırım, Ender; TÜRKOĞLU, HAŞMET (Elsevier BV, 2019-03-01)
For the analysis of thermoacoustic (TA) devices, computational methods are commonly used. In the computational studies found in the literature, the flow domain has been modelled differently by different researchers. A common approach in modelling the flow domain is to truncate the computational domain around the stack, instead of modelling the whole resonator to save computational time. However, where to truncate the domain is not clear. In this study, we have investigated how the simulation results are aff...
Performance Models for the Spike Banded Linear System Solver
Manguoğlu, Murat; Sameh, Ahmed; Grama, Ananth (Hindawi Limited, 2011)
With availability of large-scale parallel platforms comprised of tens-of-thousands of processors and beyond, there is significant impetus for the development of scalable parallel sparse linear system solvers and preconditioners. An integral part of this design process is the development of performance models capable of predicting performance and providing accurate cost models for the solvers and preconditioners. There has been some work in the past on characterizing performance of the iterative solvers them...
Comparison of Fine Grained and Coarse Grained Parallel Models in Particle Swarm Optimization Algorithm
Baştürk, Alper; Akay, Rüştü; Kalınlı, Adem (2011-11-23)
Many optimization problems are generally complex and required to be solved in parallel architectures due to theircomputational costs. The main issue about the parallelism is that the parallel architectures may affect the performancebecause the original models are constructed based upon the sequential architectures. Therefore, the parallelizationapproaches should consider the efficiency in addition to reducing computational cost. The objective of this paper is two-fold.First goal is presenting a parallelizat...
Citation Formats
C. Sener, Y. Paker, and A. Kiper, “Data-parallel programming on Helios, Parallel environment and PVM,” 1996, p. 189, Accessed: 00, 2020. [Online]. Available: https://hdl.handle.net/11511/66274.