Low voltage integrated charge pump circuits for energy harvesting applications

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2014-7
Pathirana, Walive Pathiranage Manula Randhika
Two different low voltage integrated charge pump circuit topologies are studied in this thesis for energy harvesting applications. The circuits are implemented in 0.18 μm standard CMOS technology without the use of off-chip magnetic components and non-standard processes, and are thus suitable for low profile (small and low cost) system-on-chip applications. In the first proposed design, operation at low input voltage (~240 mV) is achieved with a 5-stage subthreshold first stage oscillator, which improves the first stage efficiency by 28%. The 50 mV hysteretic on-off decision by a comparator at the second stage enables bursts of chargepumping to a standard DC voltage, and thus improves full system efficiency by 2%. The system has been validated in application to generate 1.5 V output with 4% peak efficiency and 0.24 V input voltage. The simulation-validation correlation has been presented in detail. The second proposed system has been developed with fully integrated inductors at the first stage in order to improve the efficiency obtained in the previous design. The system can successfully convert 0.2 V up to 1.5 V with 22% efficiency based on simulations. The generated output power is 31 µW which is 94% higher than that of the previous design. The inductors are modeled using 3D Planar Electromagnetic Field Solver Software incorporating the losses associated with the silicon based spiral inductors. At the ultra-low voltage range of interest, the regulators are estimated to have lower cost and improved efficiency compared to the alternatives reported in literature including the 90 nm two-stage charge pump design previously reported by our team.

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Citation Formats
W. P. M. R. Pathirana, “Low voltage integrated charge pump circuits for energy harvesting applications,” M.S. - Master of Science, Middle East Technical University, 2014.