Electrical Performance Limits of Fine Pitch Interconnects for Heterogeneous Integration

Date

2019-01-01

Author

Durgun, Ahmet Cemal
Aygun, Kemal
Mahajan, Ravi
Hoang, Tim Tri
Shumarayev, Sergey Yuryevich

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This work is licensed under a Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 International License.

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Heterogeneous integration facilitates faster design cycles with optimal functional IP module and silicon node combinations, but requires ultra-high bandwidth for the die-to-die communications. Fine pitch interconnects can meet such high bandwidth demands with simpler circuits, lower power and less latency. Hence, it is of utmost importance to understand the performance of these interconnects at different speeds and channel lengths. This paper focuses on a parametric study over the basic design parameters of a generic fine pitch interconnect, to explore the electrical performance limits. As a result of this study, practical guidelines are provided for the die-to-die channel design.

URI

https://hdl.handle.net/11511/69896

DOI

https://doi.org/10.1109/ectc.2019.00106

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Department of Electrical and Electronics Engineering, Conference / Seminar

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Citation Formats

A. C. Durgun, K. Aygun, R. Mahajan, T. T. Hoang, and S. Y. Shumarayev, “Electrical Performance Limits of Fine Pitch Interconnects for Heterogeneous Integration,” 2019, Accessed: 00, 2021. [Online]. Available: https://hdl.handle.net/11511/69896.