INVESTIGATION OF NEW ARCHITECTURAL FEATURES TO SUPPORT PERFORMANCE IMPROVEMENT IN EMBEDDED PROCESSORS

2022-8
Othman, Ahmad
Recent advances in process automation, wireless sensor networks, and machine-to-machine (M2M) interfaces have caused embedded systems to be a blooming computing segment, with significant research focus on performance and energy efficiency. The embedded systems market witnessed enormous growth over the past decades and is foreknown to be boosted in the upcoming years. It has become harder to scale CMOS technologies compared to past and get performance and energy benefits through technology and circuits. Therefore, benefits that can be obtained through architectural optimizations are even more important than before. The focus of this thesis is identification and analysis of new architectural features to potentially improve performance in embedded open-source RISC-V integer processor. Energy efficiency is ultimately enhanced as well, when such enhancements are implemented with little additional power dissipation cost. The integer core of an open-source reference (Rocketchip) processor is enhanced through new fused instructions and hardware features. Statistical data collected on the common Dhrystone and Coremark benchmarks leads to the addition of five fused instructions to the RISC-V integer Instruction-Set-Architecture (ISA), and the Rocket Chip processor organization is modified to support the new instructions. Expected performance benefits are quantified as a result of these changes as compared to the reference Rocket Chip RISC-V processor. 4.4% and 6.1% reduction in instruction count is demonstrated on 500,000 iterations of Dhrystone and 5000 iterations of Coremark benchmarks, respectively, by leveraging a particular original set of fused instructions. This results in 3.8% and 5.4% reduction in execution time for Dhrystone and Coremark benchmarks, respectively.

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Citation Formats
A. Othman, “INVESTIGATION OF NEW ARCHITECTURAL FEATURES TO SUPPORT PERFORMANCE IMPROVEMENT IN EMBEDDED PROCESSORS,” M.S. - Master of Science, Middle East Technical University, 2022.