Implementation of a distributed video codec

Download
index.pdf
2008
Işık, Cem Vedat
Show full item record
278
views
140
downloads
Current interframe video compression standards such as the MPEG4 and H.264, require a high-complexity encoder for predictive coding to exploit the similarities among successive video frames. This requirement is acceptable for cases where the video sequence to be transmitted is encoded once and decoded many times. However, some emerging applications such as video-based sensor networks, power-aware surveillance and mobile video communication systems require computational complexity to be shifted from encoder to decoder. Distributed Video Coding (DVC) is a new coding paradigm, based on two information-theoretic results, Slepian-Wolf and Wyner-Ziv, which allows exploiting source statistics at the decoder only. This architecture, therefore, enables very simple encoders to be used in video coding. Wyner-Ziv video coding is a particular case of DVC which deals with lossy source coding where side information is available at the decoder only. In this thesis, we implemented a DVC codec based on the DISCOVER (DIStributed COding for Video sERvices) project and carried out a detailed analysis of each block. Several algorithms have been implemented for each block and results are compared in terms of rate-distortion. The implemented architecture is aimed to be used as a testbed for future studies.
Electrical engineering.
http://etd.lib.metu.edu.tr/upload/2/12609240/index.pdf
https://hdl.handle.net/11511/17471
Graduate School of Natural and Applied Sciences, Thesis

Suggestions

Asynchronous design of systolic array architectures in cmos
İsmailoğlu, Ayşe Neslin; Aşkar, Murat; Department of Electrical and Electronics Engineering (2008)
In this study, delay-insensitive asynchronous circuit design style has been adopted to systolic array architectures to exploit the benefits of both techniques for improved throughput. A delay-insensitivity verification analysis method employing symbolic delays is proposed for bit-level pipelined asynchronous circuits. The proposed verification method allows datadependent early output evaluation to co-exist with robust delay-insensitive circuit behavior in pipelined architectures such as systolic arrays. Reg...
Effects of parallel programming design patterns on the performance of multi-core processor based real time embedded systems
Kekeç, Burak; Bilgen, Semih; Department of Electrical and Electronics Engineering (2010)
Increasing usage of multi-core processors has led to their use in real time embedded systems (RTES). This entails high performance requirements which may not be easily met when software development follows traditional techniques long used for single processor systems. In this study, parallel programming design patterns especially developed and reported in the literature will be used to improve RTES implementations on multi-core systems. Specific performance parameters will be selected for assessment, and pe...
Cascaded, reactively terminated, single stage distributed amplifier
Efe, Oğuzhan; Demir, Şimşek; Department of Electrical and Electronics Engineering (2008)
In this thesis work, a 3-stage ultra broadband amplifier operating in 2-18 GHz frequency band with gain 23 dB is designed, simulated and fabricated. The amplifier is based on cascaded, reactively terminated single stage distributed amplifier (CRTSSDA) concept. The idea of including reactive terminations to achieve broadband gain is investigasted and simulated. The simulated design is fabricated and measurements of the fabricated amplifier are compared with simulation results. Also practical experience on wo...
Motion compensated three dimensional wavelet transform based video compression and coding
Biçer, Aydın; Ünver, Baki Zafer; Department of Electrical and Electronics Engineering (2005)
In this thesis, a low bit rate video coding system based on three-dimensional (3-D) wavelet coding is studied. In addition to the initial motivation to make use of the motion compensated wavelet based coding schemes, the other techniques that do not utilize the motion compensation in their coding procedures have also been considered on equal footing. The 3-D wavelet transform (WT) algorithm is based on the أgroup of framesؤ (GOF) concept. The group of eight frames are decomposed both temporally and spatiall...
Design and realization of broadband instantaneous frequency discriminator
Pamuk, Gökhan; Yıldırım, Nevzat; Department of Electrical and Electronics Engineering (2010)
n this thesis, RF sections of a multi tier instantaneous frequency measurement (IFM) receiver which can operate in 2 – 18 GHz frequency band is designed, simulated and partially realized. The designed structure uses one coarse tier, three medium tiers and one fine tier for frequency discrimination. A novel reflective phase shifting technique is developed which enables the design of very wideband phase shifters using stepped cascaded transmission lines. Compared to the classical phase shifters using coupled ...
Citation Formats
C. V. Işık, “Implementation of a distributed video codec,” M.S. - Master of Science, Middle East Technical University, 2008.
METU IIS - Integrated Information Service open@metu.edu.tr