Date

2013

Author

Maadi, Muhammad

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In previous decades, the applications of ultrasound technologies in medical imaging and therapeutic systems have significantly increased. In conventional ultrasound systems, the transducer array is separated from the electronic instrumentation with multicore physical cabling. However, connection cables make the system too bulky and degrade the receive sensitivity in ultrasound 3D imaging applications because of the capacitance of long cables. The interface electronics for phased array ultrasound systems (imaging or therapeutic) use the ultrasound transducer array to steer a focused beam over the volume being fired or imaged with eliminating bulky cables. Among the available types of ultrasound transducers, CMUTs (capacitive micromachined ultrasonic transducers) are particularly interested because they do not suffer from self-heating effects in comparison with their piezoelectric counterparts. Hence, the integration of CMUTs with front-end electronics can be used in high power and continuous wave (CW) applications such as high intensity focused ultrasound (HIFU). The aim of this study is to design highly flexible and programmable transmit beam-former ASIC using a HV 0.35 µm CMOS technology to be flip-chip bonded to a 4X4 CMUT array for ultrasound therapeutic applications. However, proposed IC can be used as a transmitter circuitry in color Doppler 3D imaging applications. In our designed chip, each CMUT element is provided by an 8-bit shift register, an 8-bit comparator, a one-shot circuit with adjustable pulse width, a programmable pulse train generator and a high voltage pulser circuit. The interface electronics can generate two types of outputs with programmable focusing delays to 16 ultrasound transducer elements in different modes: The first mode is for generating single pulses in which the one-shot circuits adjust the width of the pulses from a few nanoseconds to 650 ns with enough resolution for different operating frequencies of ultrasound transducer. The second one has been considered for generating controllable pulse trains. The frequency of the generated pulse trains can be selected using digitally controlled oscillator (DCO) with three 5-bit digitally controlled delay elements (DCDE), frequency down conversion (FDC) circuit and combinational logics. In DCDE circuit depending on the 5-bit digital input vector, 32 different delay settings in the range of 5 to 50 ns can be obtained. For easy prediction of the DCDE delay time for a given digital input vector, we tried to generate a monotonic delay behavior with ascending binary input patterns in different small areas. Since, the stability of designed DCO-DCDE circuit is very important, the circuit was designed stable in -10% VDD and in 25, 50 and 75 °C temperatures variations. The temperature variation values for 25 to 50 °C and 25 to 75 °C are less than 5%. Furthermore, the circuit showed less than 5% variation for -10% supply reduction. The average power consumption of designed 5-bit DCDE with two buffers is 165 and 844 µw when the circuit generates delays of 21 ns (for generating 20 MHz pulse trains when the digital input vector is 11111) and 1.54 ps (for generating 650 GHz pulse trains when the digital input vector is 00000), respectively. To have a better resolution for the frequency of the pulse trains, we added frequency down conversion (FDC) circuit to DCO-DCDE. The output of the FDC circuit can be selected using an 8X1 multiplexer to generate 256 different pulse train frequencies in the range of 1 to 10 MHz with good resolution. Single pulse and pulse train modes are separated from each other by a 1X2 demultiplexer. At final stage the amplitudes of single pulses or pulse trains are increased up to 45 V using high voltage (HV) pulsers with THKOX module. The outputs of these pulsers are connected to flip-chip bonding pads and then the top electrodes of the CMUTs. When the magnitude of the pulses is 45 V, the rise and fall time of the output signals are 5 and 8 ns for 2.5 pF capacitive loads, respectively. The slew rate and figure of merit of the circuit at VHV = 45 V is 1.89 V/µs and 0.51 ns/(µm.V), respectively. These kinds of circuits have dramatic power consumptions. Our designed HV pulser circuit consumes 51.66 mw for 45 V output signals. Using an external control system like FPGA, the 8-bit global counter can be incremented from 1 to 256 so that each pulser circuit fires correspondent CMUT element when its stored shift register value is identical with the value of global counter. In the frame of this research, a different kind of ultrasound therapeutic interface electronics for 16X16 CMUT array has been designed in HV 0.35 µm CMOS technology. The proposed ASIC includes the same driver (LV) circuitry but 90 V high voltage pulsers with HVTHKOX module.

Subject Keywords

Ultrasonic imaging., Flip chip technology., Transducers, Biomedical., Integrated circuits.

URI

http://etd.lib.metu.edu.tr/upload/12616213/index.pdf
https://hdl.handle.net/11511/23044

Collections

Graduate School of Natural and Applied Sciences, Thesis