Switch fabric schedulers with intelligent multi-class support: design, implementation and evaluation on FPGA /

Akpınar, Murat
The applications in the contemporary computer networks require end-to-end Quality of Service (QoS). Moreover, diff erent applications have di fferent QoS requirements. Thus, it is important to support QoS in the network layer routers which can be achieved by scheduling the output queues in output queued routers. However, pure output queued routers are not easy to build. Hence, it is important to equip the fabric schedulers of input queued switches with QoS support. Thus, it is an important research problem to support QoS in input queued routers. In this thesis we investigate the VOQ fabric scheduler algorithms. Better QoS support for di fferent applications is possible by implementing per flow queues at the input ports rather than coarse virtual output queues per output port. The first contribution of this thesis is an intelligent multi-class (IMC) VOQ architecture which is independent from fabric scheduler algorithms. Additionally, 2 di fferent algorithms are proposed for intelligent side of the IMC VOQ architecture. The second contribution is a modular hardware design for fabric schedulers that support multi class. The design is carried out on FPGA by implementing the well-known ISLIP together with the proposed IMC unit. The correctness of the operation of the designed hardware is verified by comparing to a software simulator. The thesis further presents discussions of implementing other scheduler algorithms using the same hardware architecture and its scalability. The thesis presents the evaluation of FPGA resource usage of proposed IMC VOQ iSLIP.


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Citation Formats
M. Akpınar, “Switch fabric schedulers with intelligent multi-class support: design, implementation and evaluation on FPGA /,” M.S. - Master of Science, Middle East Technical University, 2014.