Show/Hide Menu
Hide/Show Apps
Logout
Türkçe
Türkçe
Search
Search
Login
Login
OpenMETU
OpenMETU
About
About
Open Science Policy
Open Science Policy
Open Access Guideline
Open Access Guideline
Postgraduate Thesis Guideline
Postgraduate Thesis Guideline
Communities & Collections
Communities & Collections
Help
Help
Frequently Asked Questions
Frequently Asked Questions
Guides
Guides
Thesis submission
Thesis submission
MS without thesis term project submission
MS without thesis term project submission
Publication submission with DOI
Publication submission with DOI
Publication submission
Publication submission
Supporting Information
Supporting Information
General Information
General Information
Copyright, Embargo and License
Copyright, Embargo and License
Contact us
Contact us
UNIBUS: a universal hardware architecture for serial bus interfaces with real-time support /
Download
index.pdf
Date
2015
Author
Duman, Mehdi
Metadata
Show full item record
Item Usage Stats
323
views
106
downloads
Cite This
Serial bus communication is widely used in different application areas such as Ethernet in computer networking, CAN bus in in-vehicle communications, MIL-STD 1553B in military avionics and UART for peripheral device communication. This thesis work presents UNIBUS (Universal Bus); an abstract, generic block level hardware architecture for implementing serial bus interfaces. UNIBUS realizes the physical and data link layer functions supporting the strict timing requirements for bit operations and synchronization. The hardware blocks and signal interfaces among these blocks are designed to separate the protocol specific and protocol independent components to increase reusability. A specific serial bus protocol can be implemented using UNIBUS by defining the protocol specific operations and interfaces. The versatility of UNIBUS is demonstrated by realizing CAN, UART, ARINC-708, ARINC-717 and MIL-STD-1553B on this architecture. These serial bus interfaces are purposely selected to be from different application areas and levels of complexity. All these interfaces are implemented using MODELSIM simulation tool and tested by realizing a sender and receiver that exchange messages as specified. Furthermore MIL-STD- 1553B is fully implemented on FPGA and its correctness is verified by communication to a commercial chip. The analysis of the resource and power consumption of the realizations shows that the generality of the architecture does not decrease the efficiency of the implementations. UNIBUS decreases the hardware development time for existing and possibly new serial bus protocols by providing the readiliy designed blocks and signal interfaces. Furthermore UNIBUS increases the reliability of the design as the reused protocol independent components that are common among different protocols need to be verified only once and the blocks together with their interfaces are clearly defined. UNIBUS can be both used for the development of full scale serial bus interface components to be used in real systems as well as developing test benches for existing products. In such deployment, a given bus interface’s desired functions can be implemented on UNIBUS to achieve a communicating counterpart for the tested component.
Subject Keywords
Field programmable gate arrays.
,
Computer architecture.
,
Computer network architectures.
URI
http://etd.lib.metu.edu.tr/upload/12618395/index.pdf
https://hdl.handle.net/11511/24373
Collections
Graduate School of Natural and Applied Sciences, Thesis
Suggestions
OpenMETU
Core
Switch fabric schedulers with intelligent multi-class support: design, implementation and evaluation on FPGA /
Akpınar, Murat; Schmidt, Şenan Ece; Department of Electrical and Electronics Engineering (2014)
The applications in the contemporary computer networks require end-to-end Quality of Service (QoS). Moreover, diff erent applications have di fferent QoS requirements. Thus, it is important to support QoS in the network layer routers which can be achieved by scheduling the output queues in output queued routers. However, pure output queued routers are not easy to build. Hence, it is important to equip the fabric schedulers of input queued switches with QoS support. Thus, it is an important research problem ...
INtERCEDE: An algorithmic approach to networked control system design
Senol, Sinan; Leblebicioğlu, Mehmet Kemal; Schmidt, Şenan Ece (Elsevier BV, 2011-07-01)
Networked Control Systems (NCS) are distributed control systems where the sensor signals to the controllers and the control data to the actuators are enclosed in messages and sent over a communication network. On the one hand, the design of an NCS requires ensuring the stability of the control system and achieving system response that is as close as possible to that of an ideal system which demands network resources. On the other hand, these resources are limited and have to be allocated efficiently to acco...
A low latency, high throughput and scalable hardware architecture for flow tables in software defined networks
Eral, Göksan; Schmidt, Şenan Ece; Department of Electrical and Electronics Engineering (2016)
Software Defined Networking (SDN) is a new paradigm which requires multi-field packet classification for each received packet by looking up Flow Tables which contain a large number of rules and corresponding actions. The rules are defined by upto 15 packet header fields including IP source and destination address. If more than one rule rule matches then the action of the highest priority rule is executed. Furthermore rules with wildcard fields are possible. The SDN Flow Table should scale with the rule coun...
Diversity Analysis of Hierarchical Modulation in Cooperative Communication
Yalcin, Ahmet Zahid; Yüksel Turgut, Ayşe Melda (2014-01-01)
In cooperative communication systems, hierarchical modulation is used to increase systems robustness and to send different information flows simultaneously. In cooperative communication systems which use hierarchical modulation, error propagation is the most important problem that prevents achieving full diversity gain. Thresholds that depend on the signal to noise ratio (SNR) value between the source and the relay can be used to mitigate error propagation. If the instantaneous SNR between the source and th...
Controller area network response time analysis and scheduling for advanced topics: offsets, FIFO queues and gateways /
Alkan, Burak; Schmidt, Şenan Ece; Schmidt, Klaus Verner; Department of Electrical and Electronics Engineering (2015)
Controller Area Network (CAN) is the most widely used in-vehicle network for the communication among electronic control units (ECUs). CAN has a priority-based arbitration mechanism and the classical usage of CAN assumes the implementation of priority queues (PQs) on ECUs. Based on this assumption, the literature provides e cient algorithms for the computation of worst-case response times (WCRTs) of messages as well as for the appropriate assignment of priorities to messages in order to meet real-time guaran...
Citation Formats
IEEE
ACM
APA
CHICAGO
MLA
BibTeX
M. Duman, “UNIBUS: a universal hardware architecture for serial bus interfaces with real-time support /,” M.S. - Master of Science, Middle East Technical University, 2015.