Show/Hide Menu
Hide/Show Apps
Logout
Türkçe
Türkçe
Search
Search
Login
Login
OpenMETU
OpenMETU
About
About
Open Science Policy
Open Science Policy
Open Access Guideline
Open Access Guideline
Postgraduate Thesis Guideline
Postgraduate Thesis Guideline
Communities & Collections
Communities & Collections
Help
Help
Frequently Asked Questions
Frequently Asked Questions
Guides
Guides
Thesis submission
Thesis submission
MS without thesis term project submission
MS without thesis term project submission
Publication submission with DOI
Publication submission with DOI
Publication submission
Publication submission
Supporting Information
Supporting Information
General Information
General Information
Copyright, Embargo and License
Copyright, Embargo and License
Contact us
Contact us
AN ADAPTIVE HYBRID ARQ SCHEME FOR SLOWLY TIME-VARYING COMMUNICATION CHANNELS
Date
1994-04-14
Author
MEMISOGLU, AT
BILGEN, S
Metadata
Show full item record
This work is licensed under a
Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 International License
.
Item Usage Stats
249
views
0
downloads
Cite This
An adaptive hybrid ARQ scheme for slowly timevarying channels that aims to maximize the average throughput under a given reliability constraint is presented. Punctured convolutional codes and the Viterbi algorithm with the Yamemoto-Itoh retransmission protocol are employed for encoding and decoding, respectively. A procedure based on exponentially weighted moving averages is developed to detect channel state changes
Subject Keywords
Automation & Control Systems
,
Computer Science, Artificial Intelligence
,
Engineering, Electrical & Electronic
,
Telecommunications
URI
https://hdl.handle.net/11511/66101
Collections
Department of Electrical and Electronics Engineering, Conference / Seminar
Suggestions
OpenMETU
Core
A GATE ARRAY CHIP FOR HIGH-FREQUENCY DSP APPLICATIONS
UNGAN, IE; ASKAR, M (1994-04-14)
A gate array architecture for high speed correlation and convolution is described. A gate array chip based on this architecture is designed and an FIR filter is implemented on thm chip. Bit-level array in pipeline structure is used in the architecture. For high 1/0 data rate, true single phase clocking circuit technique in CMOS is applied. The gate array chip is designed in 1.2pm CMOS with the programming layer metal-2 only. Spice and Verilog simulations show that the throughput is over 100 MHz
A Two-Tier Distributed Fuzzy Logic Based Protocol for Efficient Data Aggregation in Multihop Wireless Sensor Networks
SERT, SEYYİT ALPER; Alchihabi, Abdullah; Yazıcı, Adnan (Institute of Electrical and Electronics Engineers (IEEE), 2018-12-01)
This study proposes a two-tier distributed fuzzy logic based protocol (TTDFP) to improve the efficiency of data aggregation operations in multihop wireless sensor networks (WSNs). Clustering is utilized for efficient aggregation requirements in terms of consumed energy. In a clustered network, member (leaf) nodes transmit obtained data to cluster-heads (CHs) and CHs relay received packets to the base station. In multihop wireless networks, this CH-generated transmission occurs over other CHs. Due to the ado...
In-flight calibration of pico satellite attitude sensors via unscented kalman filter
Söken, Halil Ersin (Pleiades Publishing Ltd, 2011-07-01)
In this paper an Unscented Kalman filter based procedure is proposed for the bias estimation of attitude sensors of a pico satellite. Three axis magnetometers and the rate gyros are used as attitude sensors. At the initial phase, biases of three orthogonally located magnetometers are estimated as well as the attitude and attitude rates of the satellite. During initial period after the orbit injection, gyro measurements are accepted as bias free, since the precise gyros are working accurately and the accumul...
Current control of single-phase VSC systems with inductor saturation using inverse dynamic model-based compensation
Ozkan, Ziya; Hava, Ahmet Masum (Institute of Electrical and Electronics Engineers (IEEE), 2019-12-01)
In voltage-source converter (VSC) systems, utilization of filter inductors with deep saturation characteristics is often advantageous due to the improved size, cost, and efficiency. However, with the use of conventional current regulation (CCR) methods, the inductor saturation results in significant dynamic performance loss and poor steady-state current waveform quality. This paper proposes the inverse dynamic model (IDM)-based compensation method to overcome these performance issues. The method converts th...
An Automatically Mode-Matched MEMS Gyroscope With Wide and Tunable Bandwidth
Sonmezoglu, Soner; Alper, Said Emre; Akın, Tayfun (Institute of Electrical and Electronics Engineers (IEEE), 2014-04-01)
This paper presents the architecture and experimental verification of the automatic mode-matching system that uses the phase relationship between the residual quadrature and drive signals in a gyroscope to achieve and maintain matched resonance mode frequencies. The system also allows adjusting the system bandwidth with the aid of the proportional-integral controller parameters of the sense-mode force-feedback controller, independently from the mechanical sensor bandwidth. This paper experimentally examines...
Citation Formats
IEEE
ACM
APA
CHICAGO
MLA
BibTeX
A. MEMISOGLU and S. BILGEN, “AN ADAPTIVE HYBRID ARQ SCHEME FOR SLOWLY TIME-VARYING COMMUNICATION CHANNELS,” 1994, p. 336, Accessed: 00, 2020. [Online]. Available: https://hdl.handle.net/11511/66101.