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Hierarchical Hybrid Search Structure for High Performance Packet Classification
Date
2012-03-30
Author
Erdem, Oguzhan
Le, Hoang
Prasanna, Viktor K.
Metadata
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Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 International License
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Hierarchical search structures for packet classification offer good memory performance and support quick rule updates when implemented on multi-core network processors. However, pipelined hardware implementation of these algorithms has two disadvantages: (1) backtracking which requires stalling the pipeline and (2) inefficient memory usage due to variation in the size of the trie nodes.
Subject Keywords
Scalable high-throughput
URI
https://hdl.handle.net/11511/66907
Collections
Department of Electrical and Electronics Engineering, Conference / Seminar
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O. Erdem, H. Le, and V. K. Prasanna, “Hierarchical Hybrid Search Structure for High Performance Packet Classification,” 2012, p. 1898, Accessed: 00, 2020. [Online]. Available: https://hdl.handle.net/11511/66907.