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Efficiency improvement of power amplifiers without degraded linearity using a new topology and control method
Date
2011-11-21
Author
Ronaghzadeh, Amin
Demir, Şimşek
Metadata
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This paper presents a medium-power amplifier designed in class AB at 2.4 GHz with two transistors of the same type in parallel. Keeping the drain bias of the transistors constant, it is demonstrated that by careful selection of the transistor and dynamically tuning the gate bias of the individual devices and output matching of the whole amplifier according to input drive level, an increase of about 40% in PAE is achieved at 7 dB back-off from the P1dB of the class AB amplifier employing a fixed bias and matching network and giving the same maximum output power. On the other hand, at higher drive levels while maintaining the PAE nearly constant (the same situation that is experienced in Doherty techniques), a maximum improvement of 7 dB can be observed at 1 dB compression point. © 2011 IEEE.
URI
https://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=81255209020&origin=inward
https://hdl.handle.net/11511/95335
DOI
https://doi.org/10.1109/ursigass.2011.6050545
Conference Name
2011 30th URSI General Assembly and Scientific Symposium, URSIGASS 2011
Collections
Department of Electrical and Electronics Engineering, Conference / Seminar
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A. Ronaghzadeh and Ş. Demir, “Efficiency improvement of power amplifiers without degraded linearity using a new topology and control method,” presented at the 2011 30th URSI General Assembly and Scientific Symposium, URSIGASS 2011, İstanbul, Türkiye, 2011, Accessed: 00, 2022. [Online]. Available: https://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=81255209020&origin=inward.