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Design and systemc implementation of a crypto processor for AES and DES algorithms

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2007
Egemen, Tufan
This thesis study presents design and SystemC implementation of a Crypto Processor for Advanced Encryption Standard (AES), Data Encryption Standard (DES) and Triple DES (TDES) algorithms. All of the algorithms are implemented in single architecture instead of using separate architectures for each of the algorithm. There is an Instruction Set Architecture (ISA) implemented for this Crypto Processor and the encryption and decryption of algorithms can be performed by using the proper instructions in the ISA. A permutation module is added to perform bit permutation operations, in addition to some basic structures of general purpose micro processors. Also the Arithmetic Logic Unit (ALU) structure is modified to process some crypto algorithm-specific operations. The design of the proposed architecture is studied using SystemC. The architecture is implemented in modules by using the advantages of SystemC in modular structures. The simulation results from SystemC are analyzed to verify the proposed design. The instruction sets to implement the crypto algorithms are presented and a detailed hardware synthesis study has been carried out using the tool called SystemCrafter.