Hardware implementation of inverse transform & quantization and deblocking filter for low power H.264 decoder

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2009

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Önsay, Önder

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Mobile devices such as PDAs and cellular phones became indispensible part of business and entertainment world. There are a number of applications run on these devices and they tend to increase day by day causing devices tend to consume more battery power. H.264/AVC is an emerging video compression standard that is likely to be used widely in multimedia environments. As a mobile application, video compression algorithm of H.264 standard has a complex structure that increase the power demand of realizing hardware. In order to reduce this power demand, power consuming parts of the algorithm like deblocking filter and transform&quantization need to be specifically changed for low power application. A low power deblocking filter and inverse transform/quantization algorithm for H.264/AVC decoder is to be proposed and implemented on FPGA.

Subject Keywords

Electrical engineering., Computer Hardware.

URI

http://etd.lib.metu.edu.tr/upload/12610976/index.pdf
https://hdl.handle.net/11511/19072

Collections

Graduate School of Natural and Applied Sciences, Thesis

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Citation Formats

Ö. Önsay, “Hardware implementation of inverse transform & quantization and deblocking filter for low power H.264 decoder,” M.S. - Master of Science, Middle East Technical University, 2009.