Show/Hide Menu
Hide/Show Apps
Logout
Türkçe
Türkçe
Search
Search
Login
Login
OpenMETU
OpenMETU
About
About
Open Science Policy
Open Science Policy
Open Access Guideline
Open Access Guideline
Postgraduate Thesis Guideline
Postgraduate Thesis Guideline
Communities & Collections
Communities & Collections
Help
Help
Frequently Asked Questions
Frequently Asked Questions
Guides
Guides
Thesis submission
Thesis submission
MS without thesis term project submission
MS without thesis term project submission
Publication submission with DOI
Publication submission with DOI
Publication submission
Publication submission
Supporting Information
Supporting Information
General Information
General Information
Copyright, Embargo and License
Copyright, Embargo and License
Contact us
Contact us
A Phase Coherent 7-bit Digital Step Attenuator on 0.18 mu m SOI
Date
2017-10-10
Author
Jarihani, Arash Ebrahimi
Kocer, Fatih
Metadata
Show full item record
This work is licensed under a
Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 International License
.
Item Usage Stats
116
views
0
downloads
Cite This
We present a novel digital step attenuator (DSA) with low phase variation under attenuation state and frequency changes. This is achieved while keeping all other specifications comparable with the state-of-the-art. To compensate the phase shift, a number of switchable phase compensating blocks are employed. Unlike previous studies, this work achieves very low phase variation in a commercial, 4x4 quad-flat no-leads (QFN) package, where wirebond effects are significant. The proposed attenuator has 7-bit control with 0 to 31.75 dB attenuation range with 0.25 dB step sizes and achieves accurate attenuation settings in a wide frequency range. The attenuator is fabricated in a commercial 0.18 mu m RF silicon-on-insulator (SOI) process. The measurement results show that the attenuator has an amplitude error of less than 1 dB, while introducing a maximum of +/- 3 degrees phase shift up to 2.2 GHz and less than +/- 6 degrees between 2.2-3.5 GHz. This approach provides at least 2.5-fold improvement in the phase shift when compared to commercial attenuators. The input 1 dB compression point and IIP3 are measured typically higher than 35 dBm and 45 dBm, respectively. Total chip size, including pads, is 1.95mm X 0.95mm.
Subject Keywords
Digital step attenuator
,
Phase coherent attenuator
,
SOI
,
High linearity and power handling attenuator
,
Phased array systems
URI
https://hdl.handle.net/11511/64674
Collections
Department of Electrical and Electronics Engineering, Conference / Seminar
Suggestions
OpenMETU
Core
A signal overshoot suppression circuit for digital step attenuators
Kocer, Fatih (2017-03-01)
This paper presents a novel control circuit that eliminates signal overshoot inherent to digital step attenuators (DSA) during state transitions. With the addition of digital delay elements, transitions from attenuation state to insertion loss state is delayed with respect to the transition from the insertion loss state to the attenuation state. This prevents unintended signal leakage to the output, eliminating possible signal overshoot. Since this novel technique achieves signal overshoot suppression with ...
A CMOS High Frequency Pulse Width Modulation Integrated Circuit
Sahin, Osman Ulas; Kocer, Fatih (2016-08-05)
In this work, a high frequency pulse width modulation (PWM) integrated circuit (IC) designed and implemented in a commercial 0.35 mu m CMOS process is presented. Based on natural sampling method, the proposed PWM IC can generate both a PWM signal and its inverse for arbitrary frequencies up to 5 MHz. The PWM frequency can he adjusted via an external clock and an off-chip capacitor. The duty cycle of the PWM signal can be linearly varied from 5% to 95% by changing the input signal. Thanks to its analog trian...
A High Linearity Broadband Gain Block/LNA MMIC with Diode Predistortion in GaAs pHEMT Technology
Memioglu, Onur; Gundel, Adnan (2018-11-02)
This paper presents a high linearity broadband low noise amplifier/gain-block MMIC based on shunt feedback and shunt peaking circuit technique. The design targets DC-1.0 Gift band with excellent noise figure performance. At the input a diode based predistorter is used to further enhance the lineratity of the circuit. A two-stage amplifier is implemented in 0.25 m InGaAs E/D-mode plIEMT technology demonstrates a high gain and an excellent bandwidth along with high-linearity. This amplifier topology seems an ...
A Simple and Novel Modulation Technique Used to Obtain Output Voltage Having a Frequency Multiple of Input Voltage Frequency
Salimi, A.; Mansourpour, S.; Ziar, H.; Afjei, E. (2011-09-10)
This paper introduces a new modulation method that can be adopted to obtain various possible output voltages depending on the switching topology and the voltage inputs available. This method is used to obtain a sinusoidal voltage waveform with a frequency which is a multiple of the frequency of the sinusoidal input voltage. There are various applications that need a variable frequency input and a limitation is that three-phase supply is not always available. A good example to this would be single-phase indu...
A 1-V Nanopower Highly Tunable Biquadratic Gm−C Bandpass Filter for Fully Implantable Cochlear Implants
Özbek, Berkay; Külah, Haluk (2021-12-23)
This paper presents a low power highly tunable second-order Gm−C bandpass filter for auditory signal processing of fully implantable cochlear implants. The resonance frequency of the filter is tunable within the daily acoustic band of 200 - 6000 Hz with a tunable quality factor from 1 to 3. The operational transconductance amplifiers (OTAs) operate in the subthreshold region to achieve low power consumption. The input transistors are driven from the bulk to reduce the transconductance so that the low freque...
Citation Formats
IEEE
ACM
APA
CHICAGO
MLA
BibTeX
A. E. Jarihani and F. Kocer, “A Phase Coherent 7-bit Digital Step Attenuator on 0.18 mu m SOI,” 2017, p. 167, Accessed: 00, 2020. [Online]. Available: https://hdl.handle.net/11511/64674.